The '415 application describes an array of programmable logic cells, wherein each logic cell is structurally identical. The logic cells of the array are arranged in a two-dimensional matrix such that each cell has four nearest-neighbor cells, one to its left (or to the West), one to its right (or to the East), one above it (or to the North) and one below it (or to the South). For each of the four directions (North, South, East and West), the cell has two inputs and two outputs which are connected to the two outputs and two inputs of the nearest-neighbor cell in that direction. Thus, signal flow is possible in both directions in both dimensions.
FIG. 1 of the '415 application depicts a programmable logic array 10 comprising cells 22 and a bus network 12. Cells 22 are arranged in a two-dimensional matrix of rows and columns and are interconnected by bus network 12 by connections not shown in FIG. 1. The cells are also interconnected by a two-dimensional array of direct connections between a cell and its four nearest-neighbors, (i.e., the four cells immediately adjacent to the North, East, South and West). The bus network 12, which comprises repeaters 24 and vertical and horizontal buses 25, 26, 27, provides for the transfer of data within the array 10 without requiring individual cells 22 to act as logical wires. Although implicitly present, discussion of bus structure is hereinafter omitted since it is not relevant to the present invention.
One object of the present invention is to provide an improved logic cell with greatly enhanced flexibility yet relatively modest increase in size.
Another object is to provide an improved array similar to that of the '415 application but including an improved logic cell.
In the array of the '415 application, depending on the logical function implemented by a given cell, the ability of that cell to also implement "logical wires" between its unused inputs/outputs is sometimes restricted. This can result in inefficient utilization of the cells in the array of the '415 application because certain cells may be required merely to implement the logical wire functions.
Yet another object of the present invention is to provide an improved array, including an improved cell, in which the logical connections between a cell's unused inputs and outputs are not blocked.